In preparation for the Chips Joint Undertaking Work Programme 2027, Chips JU is organising two online consultation workshops on 5 October 2026. The sessions will address proposed topics on Co-Packaged Optics and System-Level Design for Heterogeneous Integration.
The workshops invite experts and stakeholders to provide feedback on the relevance and ambition of the draft concepts, contribute new ideas, and help identify key gaps and opportunities for research and innovation in Europe.
📅 5 October 2026
🕘 09:00–10:30
💻 Online
Call type: Innovation Action
Co-packaged optics is emerging as a key enabler for energy-efficient AI and high-performance computing (HPC) infrastructure. With Europe holding strong positions across several parts of the value chain, the proposed topic focuses on energy-efficient, high-throughput and low-latency data links.
Potential applications include scale-up and scale-out interconnects within data centres, data centre interconnects (scale-across), and optical circuit switching. The workshop will also address areas such as optical engine and transceiver integration, fibre-to-chip coupling, thermal management, testing, and reliability qualification.
Experts in integrated photonics, heterogeneous integration and packaging will discuss current needs and identify areas where collaborative research can accelerate the commercial development of co-packaged optics devices for relevant applications.
📅 5 October 2026
🕥 10:30–12:00
💻 Online
Current design methods and EDA tools are mature at RTL level but still face limitations at system level. Early design stages often provide insufficient insight into whether an architecture can accommodate future updates or product variants without costly redesigns.
At the same time, analogue and RF components may be integrated too late in the design process, while security and safety requirements are often addressed reactively. A unified approach for evaluating architectural choices against thermal, mechanical and cost considerations at an early stage is still missing.
The proposed topic aims to develop a new system-level design methodology for the early and holistic evaluation of complex architectures. This includes flexibility, security and long-term adaptability, as well as scalable abstraction from high-level exploration to subsystem refinement and full traceability from requirements to architectural decisions.
Closing this system-level design gap towards 2030 is considered an important element in strengthening European technological sovereignty and competitiveness, complementing efforts to expand semiconductor manufacturing capacity.
Participants in both workshops will have the opportunity to comment on the proposed concepts, share ideas and help identify the most important gaps and opportunities for European innovation.
Register here for the event
