Comprehensive VHDL Design: VLSI Digital Design for FPGA

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This course is being offered by the USCC as part of the Malta Semiconductors Competence Centre consortium activities. It povides This course provides a complete outlook into hardware description using VHDL. It begins by establishing the language’s core syntax and semantics, emphasizing its main characteristics as a hardware programming language. It progresses to examining coding styles specifically for synthesis before moving on to Finite State Machine (FSM) design and reusable, parameterized components. The course will be taught in English, and each participant will receive a certificate of attendance upon completion.

Start Date: 23-Mar-2026

End Date: 26-Mar-2026

Time: 9:00 to 12:00 & 13:00 to 16:00 each day (CET)

Location: Online Sessions

Please learn all about the event here.